Process Development and Reliability Investigations for Scaling 3D Interconnects in Advanced Semiconductor Packaging

Abstract: Advanced semiconductor packaging is playing a crucial role to drive system performance and functionality. With the increasing demand for emerging and growing computing needs, heterogeneous three-dimensional (3D) integration with fine-pitch, high-density interconnections, and multi-chip stacks are very promising in the future. The aggressive interconnects pitch scaling and nanoscale via interconnections make the process development and reliability more and more challenging. On the other hand, this high-density 3D integration system has resulted in a substantial increase in both heat flux and power density (W/cm3). High-performance, energy-efficient thermal management solutions are needed to tackle this thermal challenge. During this talk, I will first present the copper 3D interconnects manufacturing technologies and their applications in different heterogeneous 3D integration systems. The second part of this talk will focus on the micro/nano fabrications and package integration of advanced on-chip thermal cooling solutions, including impingement jet cooling, and manifold-based embedded microchannel cooling.